This post is part of a series of three post about the recent updates on the FPGA implementation of Compy. Compy FPGA – Palettes and line buffers Compy FPGA – VRAM and Cornet CPU (this one) Compy FPGAs and how I got here Video RAM Simultaneous access to RAM from the CPU and the video […]

A long time have passed since I started implementing Compy in FPGA, and I’ve made a lot of mistakes but also I’ve learned a lot. I knew a lot less about computer architecture and design than I thought I did! After being stuck for a long time with basic issues, these last weeks I’ve been […]